? semiconductor components industries, llc, 2013 may, 2013 ? rev. 20 1 publication order number: ncp502/d ncp502, ncv502 80 ma cmos low iq, low-dropout voltage regulator the ncp502 series of fixed output linear regulators are designed for handheld communication equipment and portable battery powered applications which require low quiescent. the ncp502 series features an ultra ? low quiescent current of 40 a. each device contains a voltage reference unit, an error amplifier, a pmos power transistor, resistors for setting output voltage, current limit, and temperature limit protection circuits. the ncp502 has been designed to be used with low cost ceramic capacitors. the device is housed in the micro ? miniature sc70 ? 5 and tsop ? 5 surface mount packages. standard voltage versions are 1.5 v, 1.8 v, 2.5 v, 2.7 v, 2.8 v, 2.9 v, 3.0 v, 3.1 v, 3.3 v, 3.4 v, 3.5 v, 3.6 v, 3.7 v and 5.0 v. other voltages are available in 100 mv steps. features ? low quiescent current of 40 a typical ? excellent line and load regulation ? low output voltage option ? output voltage accuracy of 2.0% ? industrial temperature range of ? 40 ? c to 85 ? c, ncv502, t a = ? 40 ? c to 125 ? c ? ncp502: 1.3 v enable threshold high, 0.3 v enable threshold low ? ncv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable ? these are pb ? free devices typical applications ? cellular phones ? battery powered consumer products ? hand ? held instruments ? camcorders and cameras figure 1. typical application diagram this device contains 86 active transistors vout battery or unregulated voltage c1 c2 off on 1 2 3 5 4 + + see detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ordering information pin connections 1 3 n/c v in 2 gnd enable 4 v out 5 (top view) xxx = specific device code a = assembly location y = year w = work week m = date code = pb ? free package marking diagram http://onsemi.com 1 2 3 4 5 sc70 ? 5 sq suffix case 419a 1 5 xxx m http://onsemi.com (note: microdot may be in either location) 1 5 tsop ? 5 (sot23 ? 5, sc59 ? 5) sn suffix case 483 1 5 xxx ayw
ncp502, ncv502 http://onsemi.com 2 1 ? power standby. when this input is pulled low, the device is disabled. if this function is not used, enable should be connected to vin. maximum ratings rating symbol value unit input voltage ? 0.3 to v in +0.3 ? 0.3 to v in +0.3 ? c ? 40 to +85 ? 40 to +125 ? c ? 55 to +150 ? c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. latchup capability (85 ? c) ? 100 ma dc with trigger voltage. thermal characteristics rating symbol test conditions value unit thermal characteristics, tsop ? 5 (note 2) thermal resistance, junction ? to ? air (note 3) r ja 1 oz copper thickness, 100 mm 2 205 ? c/w ? to ? ambient, sc70 ? 5 ja ? c/w note: single component mounted on a 80 x 80 x 15 mm fr4 pcb with stated copper head spreading area. using the following boundary conditions as stated in eia/jesd 51 ? 1, 2, 3, 7, 12. 2. true no connect. printed circuit board traces are allowable. 3. this device series contains esd protection and exceeds the following tests: human body model 2000 v per mil ? std ? 883, method 3015. machine model method 200 v..
ncp502, ncv502 http://onsemi.com 3 electrical characteristics (v in = v out(nom.) + 2.0 v, v enable = v in , c in = 1.0 f, c out = 1.0 f, t j = 25 ? c, unless otherwise noted.) characteristic symbol min typ max unit output voltage (t a = 25 ? c, i out = 10 ma) v in = v out (nom.) +1.0 v 1.5 v 1.8 v 2.5 v 2.7 v 2.8 v 2.9 v 3.0 v 3.1 v 3.3 v 3.4 v 3.5 v 3.6 v 3.7 v 5.0 v v out 1.455 1.746 2.425 2.646 2.744 2.842 2.94 3.038 3.234 3.332 3.43 3.528 3.626 4.900 1.5 1.8 2.5 2.7 2.8 2.9 3.0 3.1 3.3 3.4 3.5 3.6 3.7 5.0 1.545 1.854 2.575 2.754 2.856 2.958 3.06 3.162 3.366 3.468 3.57 3.672 3.774 5.100 v output voltage (t a = t low to t high , i out = 10 ma) v in = v out (nom.) 1.5 v 1.8 v 2.5 v 2.7 v 2.8 v 2.9 v 3.0 v 3.1 v 3.3 v 3.4 v 3.5 v 3.6 v 3.7 v 5.0 v v out 1.455 1.746 2.425 2.619 2.716 2.813 2.910 3.007 3.201 3.298 3.43 3.528 3.626 4.900 1.5 1.8 2.5 2.7 2.8 2.9 3.0 3.1 3.3 3.4 3.5 3.6 3.7 5.0 1.545 1.854 2.575 2.781 2.884 2.987 3.09 3.193 3.399 3.502 3.57 3.672 3.774 5.100 v line regulation (v in = v out + 1.0 v to 12 v, i out = 10 ma) reg line ? 0.4 3.0 mv/v load regulation (i out = 1.0 ma to 80 ma) reg load ? 0.2 0.8 mv/ma output current (v out = (v out at i out = 80 ma) ? 3%) i o(nom.) 80 180 ? ma dropout voltage (t a = t low to t high , i out = 80 ma, measured at v out ? 3.0%) 1.5 v ? 1.7 v 1.8 v ? 2.4 v 2.5 v ? 2.6 v 2.7 v ? 2.9 v 3.0 v ? 4.0 v 4.1 v ? 5.0 v ncv502 ? 5.0 v v in ? v out ? ? ? ? ? ? ? 1500 1300 1000 850 850 600 700 1900 1700 1400 1300 1200 900 1100 mv quiescent current (enable input = 0 v) (enable input = v in , i out = 1.0 ma to i o(nom.) ) i q ? ? 0.1 40 1.0 90 a output short circuit current (v out = 0 v) i out(max) 90 200 500 ma ripple rejection (f = 1.0 khz, 15 ma) rr ? 55 ? db output voltage noise (f = 100 hz to 100 khz) v n ? 180 ? vrms enable input threshold voltage (ncp502) (voltage increasing, output turns on, logic high) (voltage decreasing, output turns off, logic low) v th(en) 1.3 ? ? ? ? 0.3 v output voltage temperature coefficient t c ? 100 ? ppm/ ? c 4. maximum package power dissipation limits must be observed. pd t j(max) t a r ja 5. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
ncp502, ncv502 http://onsemi.com 4 ? 40 6 output voltage deviation (mv) 100 50 40 20 10 0 t, time ( s) ? 20 40 0 4 60 30 60 70 v in , input voltage (v) 80 90 20 5 t, temperature ( ? c) i q , quiescent current ( a) i q , quiescent current ( a) 7 3 2 1 0 0 45 figure 2. quiescent current versus input voltage v in , input voltage (v) figure 3. quiescent current versus temperature figure 4. line transient response figure 5. enable response 35 25 100 60 0 ? 20 ? 40 ? 60 30 45 40 35 32.5 5 42.5 10 20 v out = 3.0 v 37.5 v in = 5.0 v v out = 3.0 v v in = 4.0 v to 5.0 v 456 40 c out = 1.0 f i out = 30 ma 15 30 40 20 80 0 10 v out , output voltage (v) 1.0 0.4 0.3 0.1 0 t, time (ms) 1.0 2.0 0 0.2 0.5 0.6 enable voltage (v) 0.7 0.9 3.0 5 v in = 4.0 v v enable = 0 to 4.0 v i out = 30 ma c out = 1.0 f 0.8 ? 100 60 output voltage deviation (mv) 450 250 200 100 50 0 t, time ( s) ? 50 50 0 0 100 150 300 350 i out , output current (ma) 400 30 figure 6. load transient response figure 7. ripple rejection/frequency c out = 1.0 f v out = 3.0 v v in = 4.0 v 20 70 0.1 0.01 frequency (khz) 30 50 1.0 ripple rejection (db) 40 60 v in = 4.5 v + 0.5 v p ? p v out = 3.0 v i out = 30 ma c out = 1.0 f 10 100
ncp502, ncv502 http://onsemi.com 5 0 figure 8. output voltage versus temperature figure 9. output voltage versus input voltage figure 10. dropout voltage versus temperature v in ? v out , dropout voltage (mv) 125 25 ? 50 t, temperature ( ? c) 1200 v out , output voltage (v) 100 60 40 20 ? 20 ? 40 ? 60 t, temperature ( ? c) v out , output voltage (v) 6 1 0 0 3.5 v in , input voltage (v) 3 2.5 2.96 2.995 2.97 080 2.965 2.99 2.975 2.98 v in = 12 v c in = 1.0 f c out = 1.0 f v enable = v in 80 ma load v in = 4.0 v i out = 10 ma 2345 2 1.5 1 0.5 ? 25 0 50 75 100 1000 800 600 400 200 40 ma load 10 ma load 2.985
ncp502, ncv502 http://onsemi.com 6 definitions load regulation the change in output voltage for a change in output current at a constant temperature. dropout voltage the input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. measured when the output drops 3.0% below its nominal. the junction temperature, load current, and minimum input supply requirements affect the dropout level. maximum power dissipation the maximum total dissipation for which the regulator will operate within its specifications. quiescent current the quiescent current is the current which flows through the ground when the ldo operates without a load on its output: internal ic operation, bias, etc. when the ldo becomes loaded, this term is called the ground current. it is actually the difference between the input current (measured through the ldo input pin) and the output current. line regulation the change in output voltage for a change in input voltage. the measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. line transient response typical over and undershoot response when input voltage is excited with a given slope. thermal protection internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated at typically 160 ? c, the regulator turns off. this feature is provided to prevent failures from accidental overheating. maximum package power dissipation the maximum power package dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 125 ? c. depending on the ambient power dissipation and thus the maximum available output current. applications information a typical application circuit for the ncp502 series is shown in figure 1, front page. input decoupling (c1) a 1.0 f capacitor either ceramic or tantalum is recommended and should be connected close to the ncp502 package. higher values and lower esr will improve the overall line transient response. if large line or load transients are not expected, then it is possible to operate the regulator without the use of a capacitor. tdk capacitor: c2012x5r1c105k, or c1608x5r1a105k output decoupling (c2) the ncp502 is a stable regulator and does not require any specific equivalent series resistance (esr) or a minimum output current. capacitors exhibiting esrs ranging from a few m up to 5.0 can thus safely be used. the minimum decoupling value is 1.0 f and can be augmented to fulfill stringent load transient requirements. the regulator accepts ceramic chip capacitors as well as tantalum devices. larger values improve noise rejection and load regulation transient response. tdk capacitor: c2012x5r1c105k, c1608x5r1a105k, or c3216x7r1c105k enable operation the enable pin will turn on the regulator when pulled high and turn off the regulator when pulled low. these limits of threshold are covered in the electrical specification section of this data sheet. if the enable is not used then the pin should be connected to v in . hints please be sure the vin and gnd lines are sufficiently wide. when the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction. set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible. thermal as power across the ncp502 increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material and also the ambient temperature effect the rate of temperature rise for the part. this is stating that when the ncp502 has good thermal conductivity through the pcb, the junction temperature will be relatively low with high power dissipation applications.
ncp502, ncv502 http://onsemi.com 7 the maximum dissipation the package can handle is given by: pd t j(max) t a r ja if junction temperature is not allowed above the maximum 125 ? c, then the ncp502 can dissipate up to 250 mw @ 25 ? c. the power dissipated by the ncp502 can be calculated from the following equation: p tot v in *i gnd (i out ) [ v in v out ] *i out or v inmax p tot v out * i out i gnd i out if an 80 ma output current is needed then the ground current from the data sheet is 40 a. for an ncp502 (3.0 v), the maximum input voltage will then be 6.12 v. ordering information device nominal output voltage marking package shipping ? ncp502sq15t2g 1.5 lcc sc70 ? 5 (pb ? free) 3000 / tape & reel ncp502sq18t1g 1.8 lcd ncp502sq18t2g ncp502sq25t2g 2.5 lce ncp502sq27t2g 2.7 lcf ncp502sq28t2g 2.8 lcg ncp502sq29t2g 2.9 lji ncp502sq30t2g 3.0 lch ncp502sq31t2g 3.1 ljj ncp502sq33t2g 3.3 lci ncp502sq34t2g 3.4 ljk ncp502sq35t2g 3.5 lgo ncp502sq36t2g 3.6 liu ncp502sq37t2g 3.7 ljq ncp502sq50t2g 5.0 lcj ncp502sn28t1g 2.8 lkd tsop ? 5 (pb ? free) 3000 / tape & reel ncp502sn29t1g 2.9 ljn ncp502sn30t1g 3.0 lke NCP502SN31T1G 3.1 ljo ncp502sn33t1g 3.3 lkf ncp502sn34t1g 3.4 ljk ncp502sn35t1g 3.5 lj6 ncp502sn36t1g 3.6 ac4 ncp502sn37t1g 3.7 lkc ncp502sn50t1g 5.0 lkg ncv502sn50t1g* 5.0 lkg additional voltages in 100 mv steps are available upon request by contacting your on semiconductor representative. ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. *ncv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable.
ncp502, ncv502 http://onsemi.com 8 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 419a ? 01 obsolete. new standard 419a ? 02. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. dim a min max min max millimeters 1.80 2.20 0.071 0.087 inches b 1.15 1.35 0.045 0.053 c 0.80 1.10 0.031 0.043 d 0.10 0.30 0.004 0.012 g 0.65 bsc 0.026 bsc h --- 0.10 --- 0.004 j 0.10 0.25 0.004 0.010 k 0.10 0.30 0.004 0.012 n 0.20 ref 0.008 ref s 2.00 2.20 0.079 0.087 b 0.2 (0.008) mm 12 3 4 5 a g s d 5 pl h c n j k ? b ? sc ? 88a (sc ? 70 ? 5/sot ? 353) sq suffix case 419a ? 02 issue l mm inches scale 20:1 0.65 0.025 0.65 0.025 0.50 0.0197 0.40 0.0157 1.9 0.0748 solder footprint
ncp502, ncv502 http://onsemi.com 9 package dimensions tsop ? 5 sn suffix case 483 ? 02 issue k notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. maximum lead thickness includes lead finish thickness. minimum lead thickness is the minimum thickness of base material. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 per side. dimension a. 5. optional construction: an additional trimmed lead is allowed in this location. trimmed lead not to extend more than 0.2 from body. dim min max millimeters a 3.00 bsc b 1.50 bsc c 0.90 1.10 d 0.25 0.50 g 0.95 bsc h 0.01 0.10 j 0.10 0.26 k 0.20 0.60 m 0 10 s 2.50 3.00 123 54 s a g b d h c j 0.7 0.028 1.0 0.039 mm inches scale 10:1 0.95 0.037 2.4 0.094 1.9 0.074 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 0.20 5x c ab t 0.10 2x 2x t 0.20 note 5 c seating plane 0.05 k m detail z detail z top view side view a b end view on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a list ing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parame ters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ncp502/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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